RISC-V: The Rise of Open Source ISA Powering Next-Generation Computing

RISC-V Sends Shockwaves With Its Rapid Rise

RISC-V, originally developed by researchers at UC Berkeley in 2010, has been gaining significant traction in the international market. For years, RISC-V had been wandering around the hands of a few people inside academics. However, it has now become an important player inside the microprocessor industry. Semico Research predicts that 62.4 billion RISC-V CPU cores will be in the market by 2025.

2020, although a strange year for most of us, brought strong growth in the adoption of RISC-V. According to the official website, this open-source architecture has attracted big companies and found a variety of applications. For example, Alibaba released its RV64CV core, which will power its Xuantie 910 processor. The processor will be used for cloud servers in data centres and compete with existing technology like the Intel Xeon. Likewise, Espressif unveiled its cost-effective microcontroller with WiFi and Bluetooth 5.0, majorly aimed at IoT applications. Similarly, Huami will bring RISC-V to the wearable industry with its powerful AI chip.

To train the next generation of programmers and computer scientists, BBC Learning and Tynker have released the BBC Doctor Who HiFive Inventor. Companies like Esperanto Technologies, Microchip Technology, Think Silicon has introduced RISC-V powered processors for applications like machine learning, vision, graphics, AI, FPGA development, wireless audio, and wearables. Moreover, it has also found its way into government projects backed by DARPA in the United States.

A New Player in a Heavily Dominated Industry

The microprocessor industry is heavily dominated by a few major players. In the personal computing market, x86 is the dominant architecture, competed by the duopoly of Intel and AMD. Intel occupies more than 75% of the x86 market share. AMD, on the other hand, has upped its presence with its largest-ever market share in 14 years. Considering all devices that use x86 architecture, like PCs, servers, and gaming consoles, AMD has a 22.5% market share.

On the other hand, ARM reigns supreme in the mobile microprocessor market. The ARM architecture holds a 95% market share in the smartphone market as of 2019. Likewise, it also held about 34% of the total chips and microprocessor market share at the same time. Nvidia’s 40 billion USD acquisition of ARM is also set to shake up the market. However, this process might take a long time as regulators point out the damage in competition.

RISC-V, although a relatively new entry, has already proved that it cannot be ignored by the major players. ARM Holdings, who launched a scathing attack on the open-source architecture through uncertainty and fear, came under fire from its own employees. Their major argument is that although there is no licensing cost, time and money spent on design, verification, and software development will be a huge overhead. Likewise, as a relatively new entry, it needs years to prove its reliability. After the incident, ARM has been cautious of its message and accepts that the future will provide diverse options in chip architectures.

RISC-V: The Rise of Open Source ISA Powering Next-Generation Computing

Features of RISC-V

Architecturally Neutral Design

Until now, Arm has dominated the microprocessor architecture business. More than 150 billion chips have been sold to date with its license. However, RISC-V, with its open-source ecosystem, and lack of royalty fees, is gaining popularity in a heavily dominated industry.

Bit Patterns

Bit patterns are very fascinating on their own. Special techniques can be used to represent things like +0.00 or -0.00 or even reduce the effective number of bits available to indicate a compressed instruction set. RISC-V has also multiple Bit patterns for its unique instruction sets.

Load-Store Architecture

Load-Store architecture can be understood as the ISA in which only the load and store operations can access the memory. All other instructions use registers as operands. For example operations like ADD z,x,y # z:=x+y are invalid in RISC-V architecture because the operands are not registers but rather they point to some memory address.

The primary motivation to use load-store architecture by RISC-V is to speed up the execution because the registers are much faster than accessing memory for each operation.

IEEE 754 Floating Point

The RISC-V architecture uses IEEE 754 floating-point standard which is a technical standard for floating-point arithmetic. It addresses the reliability and portability issues found in other many floating-point implementations. This standard includes the definition of arithmetic formats, interchange formats, rounding rules, operations, and well-defined exception handling methods.

RISC-V: Past, Present, and Future

Although RISC-V has been finding the limelight in the recent few years, it has already been innovating for over a decade. Originating in UC Berkely in 2010, the first six years were about defining the instruction set architecture and building some test chips. Similarly, on the software side, testing was still the major priority. Between 2017 and 2018, 32-bit processors and proof of concept SOCs (system on chips) were designed for power management and communication purposes. Likewise, between 2019 and 2020, privilege modes and interrupts were introduced in hardware and SOC microcontrollers were developed for the Internet of Things (IoT) applications. In and beyond 2021, RISC-V aims to build 64-bit processors accomodating a wide range of features like multi-heart CPUs, vectors, bit manipulation, hypervisors, and debug mode. SOCs will be developed for applications in machine learning and artificial intelligence. On the software side, the development of drivers and AI-based compilers, and support for Linux systems will be the main priorities.

On the growth side, RISC-V quotes a prediction by Semico stating that the market for RISC-V processors will grow at a staggering CAGR of nearly 115% from 2020 to 2025. Likewise, with nearly 80 billion CPU cores, RISC-V will capture over 14% of the overall CPU core business across all major applications.

Recent Developments in Tech with Top World Business

In this blog, we came across the news of the growth of the open-source RISC-V instruction set architecture. First, we looked at the increase in its traction on a global scale. We saw that RISC-V is one of the key technologies for some of the biggest companies in the world. Likewise, we discussed its application in a variety of fields ranging from AI and wearables to data centres and IoT. Similarly, we shed some light on the domination of a few major players in the processor. We also showed how RISC-V will enable a wide range of CPU choices in the future. Furthermore, we gave a brief technical overview of RISC-V’s core features. Finally, we closed with how RISC-V got to this point and where it is heading.

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